The present invention relates to logic circuits using bipolar and MOS transistors and more particularly to a TTL-level BiCMOS driver which includes MOS transistors to improve switching speed and power consumption of TTL logic circuits.
In general, TTL circuits are widely used in the field of logic circuits. FIG. 1 shows such an inverter of conventional TTL circuits. In FIG. 1, if an input node VIN is in a low level state, a switching transistor Q1 is turned off and the base potential of a transistor Q2 rises. Thus, the transistors Q2 and Q3 together forming a Darlington circuit are turned on, while a switching transistor Q4 is turned off in response to the turning off of the transistor Q1 so that an output node VOUT becomes a high level state.
To the contrary, if the input node is in a high level state, the transistor Q1 is turned on and the base potential of the transistor Q2 comes down. Thus, the transistors Q2 is turned off together with another transistor Q3, so that the output node VOUT becomes a low level state.
According to this conventional TTL circuit, the charge stored in the base of the transistor Q3 should be discharged fast by connecting a resistor R1 thereto in order to achieve a fast switch of the voltage of the output node VOUT from the high level state to the low level. However, the current flows continuously through the resistor R1 when the transistor Q3 is turned on, thereby resulting in the considerable power consumption.
Moreover, in order to maintain the low level state of the output voltage VOUT, the saturation voltage for turning on the transistors Q1 and Q4 should be applied, thereby resulting in the considerable delay for switching time from the low level to high level of the output voltage VOUT.